1. Field of the Invention
The present invention relates to a pattern generating apparatus used for quality judgment testing of memories incorporating a predetermined signal transfer configuration such as a protocol transmission system. The present application is based on a patent application in Japan (Japanese Patent Application No. Hei 9-134143(1997)), and the contents of this Japanese application are incorporated herein as part of the present specification.
2. Description of the Related Art
Recently, with the speeding up of micro-processors, in order to realize a high speed system, a device incorporating a protocol transmission system which is capable of high band width data transmission has been developed by providing a special circuit in an interface section of a memory in a semiconductor memory. With this, it has become necessary to appropriately carry out quality judgment testing of the semiconductor memory. In quality judgement testing of a memory incorporating such a protocol transmission system, normally an address pattern is generated in accordance with a program of a previously created pass/fail judgement test pattern, and the pass/fail judgement test is carried out by converting this to a signal configuration for accessing the storage region of the memory to be tested (referred to hereunder as the test memory), to thereby access a predetermined memory region of the test memory.
Here with the program for the pass/fail judgment test pattern, in order to ensure access to the test memory by the generated respective test patterns, it is necessary to generate the address patterns while appropriately considering the operating conditions of the test memory. Due to this situation, then with the quality judgement test for a memory incorporating a protocol transmission system, since the programmer must previously assume the condition of the test memory at the time of operation and create the program for the test pattern based on this while considering the influence due to the protocol transmission, program creation is complicated.
Therefore, in order to avoid such difficulties with the program creation, it is desirable to carry out program creation considering only access to a desired memory region without considering the influence due to the signal transfer configuration for the test memory.